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“Hello, universe”: NASA tests a superchip 500 times faster to make spacecraft “think for themselves” on missions to the Moon and Mars, processing data in real-time without relying on commands sent from Earth.

Written by Ana Alice
Published on 21/05/2026 at 19:26
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NASA’s new space processor expands onboard computing capacity and can change the way probes, robots, and modules operate far from Earth, focusing on autonomy, resilience, and artificial intelligence.

The NASA has begun a new phase of testing for the High Performance Spaceflight Computing, a processor created to enhance the calculation capacity of spacecraft, probes, robots, and modules used in space missions.

Developed in partnership with Microchip Technology, the project aims to enable space vehicles to process data onboard and execute autonomous decisions in operations on the Moon, Mars, and long-duration missions.

Known by the acronym HPSC, the chip was designed to tackle a recurring limitation of space computing: outside Earth, processors need to withstand radiation, high-energy particles, extreme temperature variations, and shocks.

For this reason, many spacecraft still use older technologies but ones that have already been validated in harsh environments.

The American agency states that the new processor was designed to deliver more than 100 times the computational capacity of current space systems.

In tests conducted by the Jet Propulsion Laboratory, JPL, in Southern California, the initial results indicated performance 500 times superior to radiation-resistant chips used today in space missions.

Small enough to fit in the palm of your hand, NASA's high-performance space computing processor packs the power of a complete system into a chip. Image: NASA/JPL-Caltech
Small enough to fit in the palm of your hand, NASA’s high-performance space computing processor packs the power of a complete system into a chip. Image: NASA/JPL-Caltech

NASA’s HPSC Processor and Space Autonomy

The HPSC has as one of its functions to reduce dependence on commands sent from Earth.

In distant missions, communication between the ground team and the spacecraft can take minutes or more to go back and forth, which limits immediate responses in situations such as landings, obstacle avoidance, robot navigation, and scientific image analysis.

With more processing onboard, a spacecraft can interpret sensor data, select relevant information, adjust trajectories, and respond to unforeseen events without waiting for human guidance at each step.

According to NASA, this type of system should support the use of artificial intelligence in autonomous spacecraft, especially when direct operator intervention is not feasible.

This advancement has direct application in operations on planetary surfaces.

On Mars, for example, a robot needs to deal with uneven terrain, dust, shadows, rocks, and communication delays.

On the Moon, a landing module may need to quickly process images and altitude data to assess a safe landing area.

Jim Butler, HPSC project manager at JPL, stated that the team subjects the chips to radiation, temperature, shock, and functional performance tests.

According to him, the evaluation scenarios include landing simulations based on real NASA missions, used to measure the processor’s response to large volumes of sensor data.

Space Chip Tests at JPL

The start of the testing campaign was accompanied by a message sent by the team with the subject “Hello Universe.”

The expression refers to the simple messages historically used to demonstrate that a computer system is working.

The choice gave name to the statement released by NASA in May 2026.

The tests began in February and, according to the agency, are expected to continue for several months.

Until the most recent disclosure, the processor operated as expected, still in the validation phase before potential certification for use in space missions.

The HPSC is a system-on-a-chip, or SoC.

In practice, this means that the component combines, in a single piece of silicon, essential parts of a computer, such as central processing units, memory, input and output interfaces, network resources, and specialized calculation units.

The concept also appears in cell phones and tablets, but space application requires another level of resilience.

In NASA’s case, the goal is to use an SoC capable of operating for years in missions that can occur millions or even billions of kilometers away from maintenance teams.

Eugene Schwanbeck, program element manager at Game Changing Development, NASA, defined the new multicore system as “fault-tolerant, flexible, and of very high performance.”

The statement summarizes the project’s technical goal: to expand computing capacity without sacrificing the resilience required in space environments.

NASA’s Contract with Microchip Technology

The selection of Microchip Technology to develop the HPSC was announced by NASA in August 2022.

The fixed-price contract was valued at US$ 50 million, with the company’s participation in research and development costs.

At the time, the agency stated that the architecture should be delivered in three years and serve as a basis for lunar, planetary, and Mars exploration missions.

Microchip presents the PIC64-HPSC line as a family of 64-bit microprocessors with hardened and radiation-tolerant versions.

The company states that the platform was designed for mission profiles ranging from low Earth orbit to deep space, with support for artificial intelligence processing, networking features, security, and operating systems used in critical applications.

NASA also reports that the processor family will have distinct versions.

The radiation-hardened option was designed for geosynchronous, deep space, and long-duration missions to the Moon, Mars, and other destinations.

The radiation-tolerant version, on the other hand, focuses on commercial applications in low Earth orbit, such as satellites that require high reliability and cybersecurity.

Image: NASA/Microchip
Image: NASA/Microchip

Use of HPSC in Satellites, Robots, and Critical Sectors

Once certified, the HPSC could be used in Earth orbiters, exploration robots, manned habitats, and deep space missions.

According to NASA, the technology can also help process scientific data onboard, which would reduce the need to send all raw material for analysis on the ground.

The possibility of connecting sensors through advanced networks and grouping multiple chips expands the system’s usage scenarios.

In future missions, a rover could drive with greater autonomy, a probe could filter scientific images during the journey, and a module could continuously monitor its own operational condition.

The application of the technology is not limited to space exploration, according to NASA.

The HPSC base can be adapted to terrestrial areas that rely on reliable computing, such as aviation, automotive industry, industrial systems, medical equipment, power grids, communications, drones, and artificial intelligence applications.

Before flying on a mission, the processor still needs to complete environmental, functional, and qualification tests.

It will also be necessary to integrate the chip into the computing systems of each project, according to the requirements of each spacecraft or platform.

With missions increasingly distant from Earth and operations requiring quick response, embedded computing takes on a central role in NASA’s space exploration plans.

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Ana Alice

Content writer and analyst. She writes for the Click Petróleo e Gás (CPG) website since 2024 and specializes in creating content on diverse topics such as economics, employment, and the armed forces.

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